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Features
* Synthesizer, Reverb, Chorus on a Single Chip * No External ROM or RAM * Single-chip, All-in-one design Only Requires External DAC
- MIDI Control Processor - Synthesis, General MIDI Wavetable Implementation - Compatible Effects: Reverb + Chorus - Programmable Spatial Effects or Four-channel Surround (1) - 3DMIDITM Four-speaker MIDI (1) - 4-band Stereo Equalizer State-of-the-art Synthesis for Best Quality/Price Products - 38-voice Polyphony + Effects - On-chip Wavetable Data, Firmware, RAM Delay Lines Synthesizer Chipset: SAM9773 + DAC Hardware-programmable DAC Mode - I2S 16 to 20 bits - Japanese 16 bits Typical Applications: Cost-sensitive PC Wavetable Synthesis/Portable Karaoke/VCD Karaoke 80-lead TQFP Package: Small Footprint, Easy Mounting Ideal for Battery Operation - Low Power - Power-down Mode - Wide Supply Voltage Range : 2.45V to 2.95V Core, 3V to 5.5V Periphery 1. Four-channel surround and 3DMIDITM require additional DAC.
* * * * * *
Single-chip Synthesizer with Effects, Serial Interface SAM9773
Note:
Description
The SAM9773 provides a single-chip, low-cost MIDI sound system. Equipped with a serial MIDI input, it provides state-of-the-art sound synthesis together with a range of compatible effects. Its low power consumption makes it ideal for battery-powered applications such as portable Karaoke or VCD Karaoke systems. It can also be used for cost-sensitive PC-based wavetable synthesis applications. Figure 1. Typical Hardware Configuration
MIDI IN
SAM9773
Stereo DAC
Audio Out
Rev. 1715C-12/01
1
Pin Description
Pins by Function
Table 1. Power Supply Group
Pin Name GND
Pin Number Type
Function Digital Ground All pins should be connected to a ground plane. Power Supply, 3V to 5.5V All pins should be connected to a VCC plane. Core Power Supply, 2.45V to 2.95V All pins should be connected to nominal 2.7V.
5, 14, 21, 23, 30, 38, 57, 59, 61, 65, 74 6, 13, 18, 22, 32, 56, 64, 80 1, 7, 17, 60, 63
PWR
VCC VC3
PWR PWR
Table 2. Serial MIDI
Pin Name MIDI IN Pin Number 15 Type IN Function Serial TTL MIDI IN. All controls are received by this pin.
Table 3. Digital Audio Group
Pin Name CLBD WSBD DABD0 DABD1 DACSEL Pin Number 19 27 25 26 24 Type OUT OUT OUT OUT IN Function Digital audio bit clock Digital audio left/right select Digital audio main stereo output Auxiliary digital stereo output. Surround or 3DMIDI output. DAC type: 0 = I2S 16 to 20 bits, 1 = Japanese 16 bits
Table 4. Miscellaneous Group
Pin Name X1 - X2 CKOUT LFT RESET PDWN Pin Number 10, 9 20 8 11 12 Type - OUT - IN IN Function 9.6 MHz crystal connection. An external 9.6 MHz clock can also be used on X1 (2.7V input). X2 cannot be used to drive external circuits, use CKOUT instead. Buffered X2 output. Can be used to drive external DAC master clock (256 x Fs). PLL external RC network Reset input, active low. This is a Schmidt trigger input, allowing direct connection of an RC network Power down, active low. When power down is active, then all output pins will be floated. The crystal oscillator will be stopped. To exit from power down, PDWN should be high and RESET applied. Test pins. Should be grounded. When high, indicates that the synthesizer is up and running.
TEST0 TEST4 RUN
33, 34, 35, 36, 62 16
IN OUT
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Pinout by Pin Number
Table 5. Pinout by Pin Number (1)
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Note: Pin Name VC3 NC NC NC GND VCC VC3 LFT X2 X1 RESET PDWN VCC GND MIDI IN RUN VC3 VCC CLBD CKOUT Pin Number 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Pin Name GND VCC GND DACSEL DABD0 DABD1 WSBD NC NC GND NC VCC TEST0 TEST1 TEST2 TEST3 NC GND NC NC Pin Number 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Pin Name NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC VCC GND NC GND VC3 Pin Number 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Pin Name GND TEST4 VC3 VCC GND NC NC NC NC NC NC NC NC GND NC NC NC NC NC VCC
1. Signals marked NC should be left unconnected.
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1715C-12/01
Mechanical Dimensions
Figure 2. 80-lead Thin Plastic Quad Flat Pack
Table 6. Package Dimensions (in millimeters)
Dimension A A1 A2 D D1 E E1 L P B 0.22 Min 1.40 0.05 1.35 15.90 13.90 15.90 13.90 0.45 Typ 1.50 0.10 1.40 16.00 14.00 16.00 14.00 0.60 0.65 0.32 0.38 Max 1.60 0.15 1.45 16.10 14.10 16.10 14.10 0.75
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Absolute Maximum Ratings
Table 7. Absolute Maximum Ratings
Symbol Parameter/Condition Ambient Temperature (Power applied) Storage Temperature Voltage on any pin (except X1) Voltage on X1 pin VCC VC3 Supply Voltage Supply Voltage Maximum IOL per I/O pin Min -40 -6.5 -0.5 -0.5 -0.5 -0.5 Typ Max +85 +150 VCC + 0.5 VC3 + 0.25 6.5 2.95 10 Unit C C V V V V mA
Recommended Operating Conditions
Table 8. Recommended Operating Conditions
Symbol VCC VC3 TA Note: Parameter/Condition Supply Voltage (1) Supply Voltage Operating Ambient Temperature Min 3 2.45 0 Typ 3.3/5.0 2.7 - Max 5.5 2.95 70 Unit V V C
1. When using 3.3V supply in a 5V environment, care must be taken that pin voltage does not exceed VCC + 0.5V. Pin X1 is powered by VC3 input. If X1 is driven by a 5V device, then a minimum series resistor is required (typ 330).
DC Characteristics
Table 9. DC Characteristics (TA = 25C, VC3 = 2.7V 10%)
Symbol VIL VIH VOL VOH ICC Parameter/Condition Low-level Input Voltage High-level Input Voltage Low-level Output Voltage (IOL = -3.2 mA) High-level Output Voltage (IOH = 0.8 mA) Power Supply Current (crystal freq. = 9.6 MHz) Power Down Supply Current VCC 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 2.8 4.5 50 10 70 70 15 100 Min -0.5 -0.5 2.3 3.3 Typ Max 1.0 1.7 VCC + 0.5 VCC + 0.5 0.45 0.45 Unit V V V V V V V V mA mA A
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1715C-12/01
Digital Audio
Figure 3. Digital Audio Timing tCW WSBD CLBD DABD0 DABD1 tCW tCLBD
tSOD
tSOD
Table 10. Timing Parameters
Symbol tCW tSOD tCLBD Parameter CLBD Rising to WSBD Change DABDx Valid Prior to/after CLBD Rising CLBD Cycle Time Min 200 200 416.67 Typ Max Unit ns ns ns
Digital Audio Frame
Figure 4. Digital Audio Frame Format (1) WSBD (I2S) WSBD (Japanese) CLBD
DABD0 DABD1 MSB LSB (16 bits)
X
X
XXXX
XXX
XX
X
LSB (20 bits) LSB (18 bits)
MSB
Note:
1. Selection between I2S and Japanese format is through DACSEL pin .
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Reset and Power-down
During power-up, the RESET input should be held low until the crystal oscillator and PLL are stabilized, which can take about 20 ms. A typical RC/diode power-up network can be used. After RESET, the SAM9773 enters an initialization routine. It will take around 50 ms before a MIDI IN message can be processed. If PDWN is asserted low, then all I/Os and outputs will be floated, the crystal oscillator and PLL will be stopped. The chip enters a deep power-down sleep mode. To exit power down, PDWN has to be asserted high, then RESET applied.
Recommended Board Layout
As for all HCMOS high-integration ICs, some rules of board layout should be followed for reliable operation: * GND, VCC, VC3 distribution, decouplings All GND, VCC, VC3 pins should be connected. GND + VCC planes are strongly recommended below the SAM9773. The board GND + VCC distribution should be in grid form. For 5V operation, if 2.7V is not available, then VC3 can be connected to VCC by three 1N4148 diodes in series. Recommended VCC decoupling is 0.1 F at each corner of the IC with an additional 10 T decoupling close to the crystal. VC3 requires a single 0.1 F decoupling close to the IC. * Crystal, LFT The paths between the crystal, the crystal compensation capacitors, the LFT filter R-C-R and the SAM9773 should be short and shielded. The ground return from the compensation capacitors and LFT filter should be the GND plane from SAM9773. * Analog Section A specific AGND ground plane should be provided, which connects by a single trace to the GND ground. No digital signals should cross the AGND plane. Refer to the Codec vendor recommended layout for correct implementation of the analog section.
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Recommended Crystal Compensation and LFT Filter
Figure 5. Recommended Crystal Compensation and LFT Filter
C1 GND 22 pF X1 9.6 MHz GND C4 22 pF LFT C2 2.2 nF R1 100 DABD1 DABD0 VCC C3 10 nF GND PDWN WSBD CLBD RUN X2 X1
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1715C-12/01/0M

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